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Floating point unit: design and implementation with portability
Unidad aritmética de punto flotante: diseño e implementación con portabilidad
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Floating point unit: design and implementation with portability. (2022). Revista EIA, 20(39), 3905 pp. 1-20. https://doi.org/10.24050/reia.v20i39.1609
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The use of floating point units (FPU) in digital processing has increased due to the high precision and range of numbers that can be represented. In image processing, digital filters with infinite impulse response (IIR), finite impulse response (FIR) and digital controllers these types of units are required to obtain more accurate results and avoid unstable responses, however, to implement these, some processors have built-in units, which implies a technological dependence on manufacturers to develop prototypes. To avoid this dependency, this article presents the design of the modules for the operations most used in digital signal processing: multiplication and addition / subtraction. The steps and considerations to take into account are presented, such as exceptions, rounding, and normalization of operands, in order to implement these operations in any Field Programmable Gate Arrays (FPGA). Results are checked using the MODELSIM® test bench and the error rate determined using MATLAB®.
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